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Middle Power Class-D Speaker Amplifiers
Analog Input / BTL Output Class-D Speaker Amplifier
BD5423MUV
No.10075EBT03
Description BD5423MUV is a 17W + 17W stereo class-D power amplifier IC, developed for space-saving and low heat-generation applications such as low-profile TV sets. The IC employs state-of-the-art Bipolar, CMOS, and DMOS (BCD) process technology that eliminates turn-on resistance in the output power stage and internal loss due to line resistances up to an ultimate level. With this technology, the IC has achieved high efficiency of 90% (10W + 10W output with 8 load), which is the top class in the industry. The IC, in addition, employs a compact back-surface heat radiation type power package to achieve low power consumption and low heat generation and eliminates necessity of installing an external radiator, up to a total output of 34W. This product satisfies both needs for drastic downsizing, low-profile structures and powerful, high-quality playback of the sound system. Features 1) A high efficiency of 90% (10W + 10W output with 8 load), which is the highest grade in the industry and low heat-generation. 2) An output of 17W + 17W (12V, with 4 load) is allowed without an external heat radiator. 3) Driving a lowest rating load of 4 is allowed. 4) Pop noise upon turning power on/off and power interruption has been reduced. 5) High-quality audio muting is implemented by soft-switching technology. 6) An output power limiter function limits excessive output to speakers. 7) High-reliability design provided with built-in protection circuits against high temperatures, against VCC shorting and GND shorting, against reduced-voltage, and against applying DC voltage to speaker. 8) A master/slave function allowing synchronization of multiple devices reduces beat noises. 9) Adjustment of internal PWM sampling clock frequencies (250kHz to 400kHz) allows easy protective measures against unwanted radio emission to AM radio band. 10) A compact back-surface heat radiation type power package is employed. VQFN048V7070 7.0mm x 7.0mm x 1.0mm, pitch 0.5mm Absolute maximum ratings A circuit must be designed and evaluated not to exceed absolute maximum rating in any cases and even momentarily, to prevent reduction in functional performances and thermal destruction of a semiconductor product and secure useful life and reliability. The following values assume Ta =25. For latest values, refer to delivery specifications. Parameter Supply voltage Power dissipation Input voltage for signal pin Input voltage for control pin Input voltage for clock pin Operating temperature range Storage temperature range Maximum junction temperature Symbol VCC Pd VIN VCONT VOSC Topr Tstg Tjmax Ratings +20 3.28 4.8 -0.2 +7.2 -0.2 Vcc+0.2 -0.2 +7.2 -40 +85 -55 +150 +150 Unit V W W V V V Conditions Pin 2, 14, 15, 22, 23, 38, 39, 46, 47 (Note 1, 2) (Note 3) (Note 4) Pin 6, 7 (Note 1) Pin 28, 32 (Note 1) Pin 31 (Note 1)
(Note 1) A voltage that can be applied with reference to GND (pins 5, 18, 19, 42, and 43) (Note 2) Pd and Tjmax=150 must not be exceeded. (Note 3) 114.3mm x 76.2mm x 1.6mm FR4 2-layer glass epoxy board (Copper Area 5505mm2) installed. If used under Ta=25 or higher, reduce 26.2mW for increase of every 1. The board is provided with thermal via. (Note 4) 114.3mm x 76.2mm x 1.6mm FR4 4-layer glass epoxy board (Copper Area 5505mm2) installed. If used under Ta=25 or higher, reduce 38.4mW for increase of every 1. The board is provided with thermal via.
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1/16
2010.05 - Rev.B
BD5423MUV
Operating conditions The following values assume Ta =25. Check for latest values in delivery specifications. Parameter Supply voltage Load resistance
(Note 5) Pd should not be exceeded.
Technical Note
Symbol VCC RL
Ratings +10+16.5 4 16
Unit V
Conditions Pin 2, 14, 15, 22, 23, 38, 39, 46, 47 (Note 5)
Electrical characteristics Except otherwise specified Ta = 25, VCC = 12V, fIN = 1kHz, Rg = 0, RL = 8, MUTEX="H", MS="L" For latest values, refer to delivery specifications. Parameter Whole circuit Circuit current 1 (Sampling mode) Circuit current 2 (Muting mode) Control circuit "H" level input voltage "L" level input voltage Audio circuit Voltage gain Maximum output power 1 (Note 6) Maximum output power 2 (Note 6) Total harmonic distortion (Note 6) Crosstalk Output noise voltage (Sampling mode) Residual noise voltage (Muting mode) Internal sampling clock frequency GV PO1 PO2 THD CT VNO VNOM FOSC 28 10 17 0.1 85 80 1 250 dB W W % dB Vrms Vrms kHz PO = 1W THD+N = 10%, RL = 8 THD+N = 10%, RL = 4 PO = 1W, BW=20Hz20kHz PO = 1W, Rg = 0, BW = IHF-A Rg = 0, BW = IHF-A Rg = 0, BW = IHF-A, MUTEX = "L" MS = "L" (In master operation) VIH VIL 2.312 00.8 V V MUTEX, MS MUTEX, MS ICC1 ICC2 25 10 mA mA With no signal MUTEX = "L" Symbol Limits Unit Conditions
(Note 6) The rated values of items above indicate average performances of the device, which largely depend on circuit layouts, components, and power supplies. The reference values are those applicable to the device and components directly installed on a board specified by us.
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2/16
2010.05 - Rev.B
BD5423MUV
Electrical characteristic curves (Reference data) (1) Under Stereo Operation(RL=8)
Technical Note
100 10 THD+N (%) 1 0.1 0.01 0.001 0.01 0.1 1 10 100 OUTPUT POWER (W) Vcc=12V RL=8 BW=2020kHz 6kHz
100 10 THD+N (%) 1 0.1
100Hz
Vcc=12V RL=8 Po=1W BW=2020kHz
1kHz
0.01 10 100 1000 10000 100000 FREQUENCY (Hz)
Fig. 2 THD+N Frequency
Fig. 1 THD+N Output power
40 35 VOLTAGE GAIN (dB)
CROSSTALK (dB)
0 -20 Vcc=12V RL=8 Po=1W BW=2020kHz
30 25 20 15 10 5 0 10 100 1000 FREQUENCY (Hz) 10000 100000 Vcc=12V RL=8 Po=1W L=33H C=0.47F C=0.1F
-40 -60 -80 -100 10 100 1000
10000
100000
FREQUENCY (Hz)
Fig. 3 Voltage gain - Frequency
Fig. 4
Crosstalk - Frequency
0 CROSSTALK (dB) -20 -40 -60 -80 -100 0.001
OUTPUT POWER (W)
Vcc=12V RL=8 fin=1kHz BW=2020kHz
20 15 10 5 0
RL=8 fin=1kHz
THD=10%
THD=1%
0.01
0.1
1
10
100
8
10
12
14
16
18
OUTPUT POWER (W)
Fig. 5 Crosstalk - Output power
VCC (V)
Fig. 6 Output power - Power supply voltage
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3/16
2010.05 - Rev.B
BD5423MUV
Electrical characteristic curves (Reference data) - Continued
Technical Note
100 90 80 70 60 50 40 30 20 10 0 0 5 10
Vcc=10V RL=8 fin=1kHz
15
20
100 90 80 70 60 50 40 30 20 10 0 0 5 10
EFFICIENCY (%)
EFFICIENCY (%)
Vcc=12V RL=8 fin=1kHz
OUTPUT POWER (W/ch)
Fig. 7 Efficiency - Output power
15
20
OUTPUT POWER (W/ch)
Fig. 8 Efficiency - Output power
100 90 80 70 60 50 40 30 20 10 0 0 5 10
3 Vcc=16.5V Vcc=12V 2 ICC (A) Vcc=10V 1
Vcc=16.5V RL=8 fin=1kHz
RL=8 fin=1kHz
EFFICIENCY (%)
0
15
20
0
5
10
15
20
25
30
35
40
OUTPUT POWER (W/ch)
Fig. 9 Efficiency - Output power
TOTAL OUTPUT POWER (W)
Fig. 10 Current consumption - Output power
100 90 80 70 60 50 40 30 20 10 0 8
0
RL=8 Without signal
-20 NOISE FFT (dBV) -40 -60 -80 -100 -120 -140 10 100
ICC (mA)
Vcc=12V RL=8 Without signal BW=2020kHz
Sampling Mute
10
12
14 VCC (V)
16
18
1000
10000
100000
FREQUENCY (Hz)
Fig. 12 FFT of Output Noise Voltage
Fig. 11 Current consumption - Power supply voltage
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4/16
2010.05 - Rev.B
BD5423MUV
Electrical characteristic curves (Reference data) - Continued
Technical Note
MUTEX Pin 28
10V/div
TM Pin 34
5V/div
Vcc=12V RL =8 Po=500m W fin=500Hz
MUTEX Pin 28 TM Pin 34
10V/div
5V/div
Vcc=12V RL =8 Po=500mW fin=500Hz
Speaker output
2V/div 10msec/div
Speaker output
2V/div
10msec/div
Fig. 13 Wave form when Releasing Soft-mute
Fig. 14 Wave form when Activating Soft-mute
Fig. 15 Wave form on Instantaneous Power Interruption (20msec / div)
Fig. 16 Wave form on Instantaneous Power Interruption (2msec / div)
Fig. 17 Wave form on Output Power Limiter function (Po = 5W)
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5/16
2010.05 - Rev.B
BD5423MUV
Electrical characteristic curves (Reference data) - Continued (2) Under Stereo Operation(RL=6)
Technical Note
25 OUTPUT POWER (W) 20 15 10 5 0 8 10 12 14 16 18 VCC (V) RL=6 fin=1kHz THD=10%
Fig. 18 Output power - Power supply voltage
100 90 80 70 60 50 40 30 20 10 0 0 5 10 15 OUTPUT POWER (W/ch)
Vcc=10V RL=6 fin=1kHz 20 25
100 90 80 70 60 50 40 30 20 10 0 0 5 10 15 OUTPUT POWER (W/ch)
EFFICIENCY (%)
EFFICIENCY (%)
Vcc=12V RL=6 fin=1kHz 20 25
Fig. 19
Efficiency - Output power
Fig. 20
Efficiency - Output power
100 90 80 70 60 50 40 30 20 10 0 0 5 10 15
4 3 ICC (A) Vcc=10V 2 1 0 Vcc=16.5V Vcc=12V
EFFICIENCY (%)
Vcc=16.5V RL=6 fin=1kHz
RL=6 fin=1kHz
20
25
0
5
10
15
20
25
30
35
40
45
50
OUTPUT POWER (W/ch)
TOTAL OUTPUT POWER (W)
Fig. 21
Efficiency - Output power
Fig. 22 Current consumption - Output power
Dotted lines of the graphs indicate continuous output power to be obtained on musical signal source or by installing additional heat sinks.
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6/16
2010.05 - Rev.B
BD5423MUV
Electrical characteristic curves (Reference data) - Continued (3) Under Stereo Operation(RL=4)
Technical Note
30 OUTPUT POWER (W) 25 20 15 10 5 0 8 10 12 14 16 18 VCC (V)
Fig. 23 Output power - Power supply voltage
RL=4 fin=1kHz
THD=10%
100 90 80 70 60 50 40 30 20 10 0 0 5 10 15 OUTPUT POWER (W/ch)
Vcc=10V RL=4 fin=1kHz 20
100 90 80 70 60 50 40 30 20 10 0 0 5
Fig. 25
EFFICIENCY (%)
EFFICIENCY (%)
Vcc=12V RL=4 fin=1kHz 10 15 20
OUTPUT POWER (W/ch)
Efficiency - Output power
Fig. 24
Efficiency - Output power
100 90 80 70 60 50 40 30 20 10 0 0 5 10
4 3 ICC (A) 2 1 0 Vcc=10V Vcc=12V Vcc=16.5V
RL=4 fin=1kHz
EFFICIENCY (%)
Vcc=16.5V RL=4 fin=1kHz
15
20
0
5
10
15
20
25
30
35
40
OUTPUT POWER (W/ch)
Fig. 26 Efficiency - Output power
TOTAL OUTPUT POWER (W)
Fig. 27 Current consumption - Output power
Dotted lines of the graphs indicate continuous output power to be obtained on musical signal source or by installing additional heat sinks.
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7/16
2010.05 - Rev.B
BD5423MUV
Pin Assignment
Technical Note
Top View
PLMT4 PLMT3 PLMT2 PLMT1 BSP1P BSP2P 1
N.C. 48 N.C.
GNDA
12
11
10
9
8
7
6
GNDA
5
FILA
4
FILP
3
VCCA
Power Limit
N.C. 13 N.C. VCCP1P 14 VCCP1P 15 OUT1P 16 OUT1P 17 GNDP1 18 GNDP1 19 OUT1N 20 OUT1N 21 VCCP1N 22 VCCP1N 23
WARNING ERROR DRIVER 1N DRIVER 1P
VCCA 2
FILA
FILP
IN1
IN2
47 VCCP2P
PWM1 PWM2
46 VCCP2P
DRIVER 2P
45 OUT2P 44 OUT2P 43 GNDP2 42 GNDP2
Protections & Logic
Under Voltage Protection High Temperature Protection Output Short Protection Output DC Voltage Protection
Ramp Generator
DRIVER 2N
41 OUT2N 40 OUT2N 39 VCCP2N 38 VCCP2N
Power-Off Detector
Clock Control
Mute Control
N.C.
SOFT MUTE
24 N.C.
N.C. 37 N.C.
N.C. N.C.
25 BSP1N
26 WARNING
27 ERROR
28 MUTEX
29 N.C.
30 N.C.
31 OSC
32 MS
33 ROSC
34 TM
35 VHOLD
36 BSP2N
Fig. 28 Pin Assignment Diagram
Outer Dimensions and Inscriptions
Type
BD5423
Lot No.
Fig. 29 Outer Dimensions and Inscriptions of VQFN048V7070 Package
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8/16
2010.05 - Rev.B
BD5423MUV
Explanation of Pin Functions (Provided pin voltages are typical values.) No. 2 Symbol VCCA Pin voltage Vcc Pin description Analog system power pin
Technical Note
Internal equalizing circuit
3
FILP
Vcc+35 12
PWM system bias pin Connect a capacitor.
Analog signal system bias pin 4 FILA 3.5V Connect a capacitor.
5
GNDA
0V
Analog system GND pin
6 7
IN2 IN1
3.5V
ch2 Analog signal input pin ch1 Analog signal input pin Input audio signal via a capacitor.
8
PLMT1
3.5V
Voltage-to-current conversion pin for output power limiter function Connect a register.
9
PLMT2
-
Current-to-voltage conversion pin for output power limiter function Connect a register.
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9/16
2010.05 - Rev.B
BD5423MUV
Explanation of Pin Functions - Continued No. Symbol Pin voltage Pin description
Technical Note
Internal equalizing circuit
10
PLMT3
-
Current-to-voltage conversion pin for output power limiter function Connect a register.
Bias pin for output power limiter function 11 PLMT4 3.5V Connect a register and a capacitor.
12
BSP1P
-
ch1 positive bootstrap pin Connect a capacitor.
14, 15
VCCP1P
Vcc
ch1 positive power system power supply pin
16, 17
OUT1P
Vcc0V
ch1 positive PWM signal output pin Connect with output LPF.
18, 19
GNDP1
0V
ch1 power system GND pin
20, 21
OUT1N
Vcc0V
ch1 negative PWM signal output pin Connect with output LPF.
22, 23
VCCP1N
Vcc
ch1 negative power system power supply pin
25
BSP1N
-
ch1 negative bootstrap pin Connect a capacitor
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10/16
2010.05 - Rev.B
BD5423MUV
Explanation of Pin Functions - Continued No. Symbol Pin voltage Pin description
Technical Note
Internal equalizing circuit
Warning output pin 26 WARNING H: 5V L: 0V Pin to notify operation warning. H: Under warning L: Normal operation Connect a resister.
Error output pin 27 ERROR H: 5V L: 0V A pin for notifying operation errors. H: Error L: Normal operation Connect a resister.
Audio mute control pin 28 MUTEX H: Mute off L: Mute on
13, 24 29, 30 37,48
N.C.
-
N.C. pin Nothing is connected with IC internal circuit.
Sampling clock signal input/output pin 31 OSC When using two or more sampling clocks, connect via a capacitor.
Master/Slave switching pin 32 MS Switching of master/slave functions on a sampling clock signal. H: Slave operation L: Master operation
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11/16
2010.05 - Rev.B
BD5423MUV
Explanation of Pin Functions - Continued No. Symbol Pin voltage Pin description
Technical Note
Internal equalizing circuit
33
ROSC
5.6V
Internal PWM sampling clock frequency setting pin Usually the pin is used open. To adjust an internal sampling clock frequency, connect a resister.
Audio muting constant setting pin 34 TM 05V Connect a capacitor.
Instantaneous power interruption detecting voltage setting pin 35 VHOLD 0.68xVcc Connect a capacitor. To adjust a detecting voltage, connect a resister.
36
BSP2N
-
ch2 negative bootstrap pin Connect a capacitor.
38, 39
VCCP2N
Vcc
ch2 negative power system power supply pin ch2 negative PWM signal output pin Connect an output LPF.
40, 41
OUT2N
Vcc0V
42, 43
GNDP2
0V
cch2 power system GND pin
44, 45
OUT2P
Vcc0V
ch2 positive PWM signal output pin Connect an output LPF. ch2 positive power system power supply pin ch2 positive bootstrap pin Connect a capacitor.
46, 47
VCCP2P
Vcc
1
BSP2P
-
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12/16
2010.05 - Rev.B
BD5423MUV
Application Circuit Diagram (under stereo operation) Vcc=10V16.5V
SP INPUT 1ch SP INPUT 2ch GNDA VCCA
Technical Note
GNDA
GNDA
C11 0.1F
C7 2.2F
2.2F
R9 22k R10 22k
R8 22k
C2 10F C5
C6
12
11
10
9
8
7
6
GNDA
5
C4 10F
4
FILP
C3 1F
3
VCCA
0.1F
+ 2
1
Power Limit
VCCP1 C12 0.68F
N.C. 13 N.C.
FILA
N.C. 48 N.C.
C1 0.68F
VCCP2
14
C15 10F + C14 0.1F
47
PWM1 PWM2
15 16 17 18
DRIVER 1P
46
DRIVER 2P
L16 15H C16 0.22F
C46 0.1F
45 44 43 42
L44 15H C44 0.22F
+ C39 10F
C17 1F
C41 1F
SP 1ch (4)
GNDP1
C20 0.22F 15H L20
19 20
C22 0.1F
C40 0.22F 15H L40
GNDP2
21 22
DRIVER 1N
Protections & Logic
Under Voltage Protection High Temperature Protection Output Short Protection Output DC Voltage Protection
Ramp Generator
DRIVER 2N
41 40 39 38
C38 0.1F
SP 2ch (4)
WARNING
ERROR
N.C. 24 N.C.
Power-Off Detector
C25 0.68F
23
C36 0.68F
Clock Control
Mute Control
SOFT MUTE
N.C. 37 N.C.
N.C. N.C.
25
26
27
28
29
N.C.
30
N.C.
C31
31
0.1F
32
33
OPEN
34
0.1F
35
36
3.3F C35
WARNING OUTPUT R26 GNDD 100k ERROR OUTPUT R27 GNDD 100k MUTESPX
CAREER I/O
MASTER SLAVE
C34
Fig. 30 Circuit Diagram of Stereo Operation with 4 Load
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GNDD
13/16
2010.05 - Rev.B
BD5423MUV
Table 1 BOM List of Stereo Operation with 4 Load
No. 1 2 3 4 5 6 7 8 9 10 11 12 13 Item IC C C C C C C C C C C R R Part Number BD5423MUV GRM219B31E684KA88 GRM188R11H104KA93 GRM31MB11H224KA01 25ST225M3216 50ST105M3225 GRM21BB31E335KA75 GRM188B11E104KA01 GRM21BB11C105KA01 GRM21BB31C106KE15 25SVPD10M MCR01MZPF2202 MCR01MZPF1003 Vendor ROHM MURATA MURATA MURATA Rubycon Rubycon MURATA MURATA MURATA MURATA SANYO ROHM ROHM Configuration mm inch Value 0.68F 0.1F 0.22F 2.2F 1F 3.3F 0.1F 1F 10F 10F 22k 100k Rated voltage 25V 50V 50V 25V 50V 25V 25V 16V 16V 25V 50V 50V Tolerance 10% 10% 10% 20% 20% 10% 10% 10% 10% 20% 1% 1% Temperature Quantity characteristics 10% 15% 10% 5% 5% 10% 10% 10% 10% 25% 200ppm/ 200ppm/ 1 4 5 4 2 2 1 3 1 1 3 3 2
Technical Note
Reference IC1 C1, C12, C25, C36 C5, C14, C22, C38, C46 C16, C20, C40, C44 C6, C7 C17, C41 C35 C11, C31, C34 C3 C4 C2, C15, C39 R8, R9, R10 R26, R27
VQFN048V7070 2012 1608 3216 3225 3225 2012 1608 2012 2012 6666 1005 1005 0805 0603 1206 1210 1210 0805 0603 0805 0805 2626 0402 0402
No. 14
Item L
Part Number 7G09B-150M
Vendor SAGAMI
Configuration mm 10x9x10
Value 15Hx2
Tolerance 20%
DC Resistance 44mmax.
Rated DC Current 4.1A max.
Quantity 2
Reference L16, L20, L40, L44
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14/16
2010.05 - Rev.B
BD5423MUV
Technical Note
Notes for use Notes for use 1. About absolute maximum ratings If an applied voltage or an operating temperature exceeds an absolute maximum rating, it may cause destruction of a device. A result of destruction, whether it is short mode or open mode, is not predictable. Therefore, provide a physical safety measure such as fuse, against a special mode that may violate conditions of absolute maximum ratings. 2. About power supply line As return of current regenerated by back EMF of output coil happens, take steps such as putting capacitor between power supply and GND as a electric pathway for the regenerated current. Be sure that there is no problem with each property such as emptied capacity at lower temperature regarding electrolytic capacitor to decide capacity value. If the connected power supply does not have sufficient current absorption capacity, regenerative current will cause the voltage on the power supply line to rise, which combined with the product and its peripheral circuitry may exceed the absolute maximum ratings. It is recommended to implement a physical safety measure such as the insertion of a voltage clamp diode between the power supply and GND pins. 3. Potential of GND (5, 18, 39, 42, and 43 pins) Potential of the GND terminal must be the lowest under any operating conditions. 4. About thermal design Perform thermal design with sufficient margins, in consideration of maximum power dissipation Pd under actual operating conditions. This product has an exposed frame on the back of the package, and it is assumed that the frame is used with measures to improve efficiency of heat dissipation. In addition to front surface of board, provide a heat dissipation pattern as widely as possible on the back also. A class-D power amplifier has heat dissipation efficiency far higher than that of conventional analog power amplifier and generates less heat. However, extra attention must be paid in thermal design so that a power dissipation Pdiss should not exceed the maximum power dissipation Pd. T jmax - Ta Tjmax: Maximum temperature junction = 150[] Pd W Maximum power dissipation ja Ta: Operating ambient temperature [] ja: Package thermal resistance [/W] 1 Po: Output power [W] Pdiss PO - 1 W Power dissipation : Efficiency 5. About operations in strong electric field Note that the device may malfunction in a strong electric field. 6. Thermal shutdown (TSD) circuit This product is provided with a built-in thermal shutdown circuit. When the thermal shutdown circuit operates, the output transistors are placed under open status. The thermal shutdown circuit is primarily intended to shut down the IC avoiding thermal runaway under abnormal conditions with a chip temperature exceeding Tjmax = 150, and is not intended to protect and secure an electrical appliance. Accordingly, do not use this circuit function to protect a customer's electrical appliance. 7. About shorting between pins and installation failure Be careful about direction and displacement of an LSI when installing it onto the board. Faulty installation may destroy the LSI when the device is energized. In addition, a foreign matter getting in between LSI pins, pins and power supply, and pins and GND may cause shorting and destruction of the LSI. 8. About power supply startup and shutdown When starting up a power supply, be sure to place the MUTEX pin (pin 28) at "L" level. When shutting down a power supply also, be sure to place the pin at "L" level. Those processes reduce pop noises generated upon turning on and off the power supply. In addition, all power supply pins must be started up and shut down at the same time. 9. About WARNING output pin (pin 26) and ERROR output pin (pin 27) A WARNING flag is output from the WARNING output pin upon operation of the high-temperature protection function and under-voltage protection function. And an ERROR flag is output from the ERROR output pin upon operation of VCC/GND shorting protection function and speaker DC voltage applying protection function. These flags are the function which the condition of this product is shown in. The use which aimed at the protection except for this product is prohibition. 10. About N.C. pins (pins 13, 24, 29, 30, 37, and48) The N.C. (Non connection) pins are not connected with an internal circuit. Leave the pins open or connect them to GND.
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15/16
2010.05 - Rev.B
BD5423MUV
Ordering part number
Technical Note
B
Part No BD.
D
5
Part No. 5423
4
2
3
M
U
V
-
E
2
Package MUV: VQFN048V7070
Packaging and forming specification E2: Embossed tape and reel
VQFN048V7070
7.0 0.1

Tape Quantity Embossed carrier tape 1500pcs E2
The direction is the 1pin of product is at the upper left when you hold
7.00.1
1PIN MARK
1.0MAX
Direction of feed
S
( reel on the left hand and you pull out the tape on the right hand
)
0.08 S
C0.2 1 48
4.7 0.1
12
13
0.40.1
37 36 25
24
4.70.1
+0.03 0.02 -0.02
(0.22)
0.75
0.5
+0.05 0.25 -0.04
1pin (Unit : mm) Reel
Direction of feed
Order quantity needs to be multiple of the minimum quantity.
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16/16
2010.05 - Rev.B
Notice
Notes
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